As the critical dimensions of devices, such as transistors, memory, photovoltaic cells or the like continue to shrink, the interface between components of such devices becomes substantially more critical. For example, undesired contaminants at the interface between components may result in increased junction resistance, parasitic capacitance, or other such undesired effects. For example, prior to the deposition of a layer on a substrate or film, a native oxide may be removed to prepare the surface of the substrate or film for deposition of the layer. The inventors have discovered that removal of the native oxide is not sufficient and that contaminants remain on the surface of the substrate or film in higher than acceptable concentrations, which results in contamination at the interface when a layer is subsequently deposited on the substrate. Although a high temperature anneal (e.g., >about 700 Celsius in a hydrogen (H2) atmosphere) performed after the removal of the native oxide can be used to remove the contaminants, the inventors believe that the high energy requirements and decreased process throughput associated with the high temperature anneal are undesirable.
Accordingly, the inventors have provided methods for reducing contamination at the interface between a deposited layer and an underlying substrate or film.